Tencent announces the progress of three self-developed chips: AI reasoning chip has been successfully taped out and lit

Tencent may implement the 965 work system, and overtime is related to assessing leadership performance.

Tencent officially disclosed the progress of chip research and development for the first time.

According to Unshared News : On November 3, at the Tencent Digital Ecology Conference in Wuhan, Tang Daosheng, Senior Executive Vice President of Tencent and CEO of the Cloud and Smart Industry Group, announced that Tencent has made progress on three self-developed chips, namely AI inference chips. “Zixiao”, video transcoding chip “Canghai” and smart network card chip “Xuanling”. In addition, Tencent also officially announced the cloud-native operating system “Achi”.

According to reports, the most notable feature of the Zixiao AI reasoning chip is the combination of image and video processing, natural language processing, search recommendation and other scenes, and the use of 2.5D packaging technology to seal the HBM2e memory and AI core, and the addition of computer vision CV inside the chip Innovative measures such as accelerators and video codec accelerators optimize the chip architecture and break the bottleneck that restricts the use of chip computing power.

The Canghai transcoding chip fully implements all mainstream coding tools such as high-precision motion search, full-rate distortion optimization, and efficient adaptive quantization on the algorithm, and integrates the leading technology of Tencent Cloud software encoder rate control; at the same time, Canghai Through flexible multi-core expansion architecture, high-performance encoding pipeline, hierarchical memory layout and other technologies, it can also effectively meet the business requirements of high throughput, low latency and real-time.

The Xuanling smart network card chip is positioned to accelerate the performance of the cloud host. It optimizes the chip architecture in combination with CVM/BM/container scenarios, and moves the virtualization, network/storage IO and other functions that originally run on the main CPU down to the chip. 0 occupancy of the main CPU.

Qiu Yuepeng, vice president of Tencent and COO of the cloud and smart industry business group, introduced that Tencent’s AI inference chip, Zixiao, has a performance improvement of 100% compared to the industry. It has been successfully taped out and successfully lit; it supports hardware encoders in the World Encoding Competition. The award-winning Canghai video transcoding chip has a compression rate of more than 30% higher than that of the industry; at the same time, the smart network card chip Xuanling developed by Tencent has improved the performance of the industry’s products by 4 times.

On November 2, in an interview with the media, Tang Daosheng once talked about Tencent’s chip research and development plan. He said that the investment in this area is driven by demand. “We will be more aware of the reasons behind making chips and why we should do this. This will guide us in which areas to invest.”

He also mentioned that in addition to doing its own chip research and development, Tencent will also cooperate closely with existing chip manufacturers. “Virtual networks consume computing resources very much. In order to reduce the energy consumption of infrastructure, we will focus on the design of hardware and chips to achieve the desired results. Our self-developed servers require chip manufacturers, and we will provide them with requirements, and they will According to the scenario, when we reach a certain scale, we will be invested and supported. There are many operations and considerations in this regard.”

According to public information, Tencent has previously invested in cloud AI chip company Suiyuan Technology. At present, Suiyuan Technology has released the second generation of AI chips, and mass production is expected by the end of this year. In 2020, Tencent also established the Penglai Lab, which focuses on chip research and development, aiming to achieve full coverage of chip end-to-end design and verification.

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